Application-specific integrated circuits (ASICs), have been supplanted more and more by integrated circuits (ICs) that can be programmed to fulfill multiple functions. There are now many various programmable logic architectures, including, for example, programmable logic devices (“PLDs”), programmable logic arrays (“PLAs”), complex programmable logic devices (“CPLDs”), field programmable gate arrays (“FPGAs”) and programmable array logic (“PALs”). Although there are differences between these various architectures, each of the architectures typically includes a set of input conductors coupled as inputs to an array of logic gates (e.g., a product term array made up of logical AND gates), the outputs of which, in turn, act as inputs to another portion of the logic device. Complex Programmable Logic Devices (“CPLDs”) are large scale PLDs that, like all programmable architectures, are configured to the specific requirements of an application by programming.
Each of these architectures, originally programmed once for a specific function which would be a device's only function for its lifetime, has begun to be implemented in a reprogrammable form. A programmable logic device can now be re-programmed in operation and can fulfill the functions of many different devices.
The complexity of a programmable device requires complex programming of each of its configurations which can be stored. Each stored configuration reprogramming can be accomplished “on the fly” by applying the stored configuration to the device.
Initial programming of a highly complex device, though, can be tedious and time consuming. Numerous tools have been developed to aid the programmer in forming each configuration necessary to each device. However, even with current configuration tools, a programmer must track innumerable lines of programming and device characteristics in order to properly establish a complex device configuration. Most particularly, the configuration of a device's input/output pins which have different characteristics with every different device configuration requires meticulous attention to detail. Moreover, these pin characteristics, crucial for proper device operation, must relate properly to the device configuration and to external circuitry. Currently, the programming tool sophistication requires a very burdensome level of expertise on the part of the programmer and an enormous number of manual, error-prone and tedious to be done which can limit the market of users of these complex programmable devices.
A need exists, therefore, for a method for programming highly complex programmable devices, particularly for configuring I/O pins differently for each programmed device configuration. Furthermore, such a method must be much more user-friendly than currently available, enabling a user of normal skills to configure enormously complex programmable devices with multiple configurations.